Introduction This is something I always want to write about, since it is a very big issue throughout a programmer's whole life. Makefile short code Makefile is a GNUMake program that helps you compiling the source code in a incremental way so that it can save a lot time. Here is a quick and dirty code I googled for whole night to obtain, cannot be found anywhere else. Basically this is an universal Makefile: - Makefile - src/*.cpp - build/*.o The Makefile below will automatically compiling everything in src and move them to build directory, to achieve build-compiling separation which is very important to clear your code structure. Final exe will be in the root directory ================================================================= Universal Makefile - separate build and debugging ================================================================= CC = g++ LD = g++ CFLAG = -Wall PROG_NAME = prog SRC_DIR = ./src BUILD_DIR = ./build BIN_DIR = ./bin SRC_LIST = $(wildcard $(SRC_DIR)/*.cpp) OBJ_LIST = $(BUILD_DIR)/$(notdir $(SRC_LIST:.cpp=.o)) .PHONY: all clean $(PROG_NAME) compile all: $(PROG_NAME) compile: $(CC) -c $(CFLAG) $(SRC_LIST) -o $(OBJ_LIST) $(PROG_NAME): compile $(LD) $(OBJ_LIST) -o $(BIN_DIR)/$@ clean: rm -f $(BIN_DIR)/$(PROG_NAME) $(BUILD_DIR)/*.o ================================================================= Brief on programming behind the scence Compiling and linking program has two key things that you need out-of-your-current code
Include is for the header files, which is a declaration for the main program that there exists a special stuff you need somewhere. Linking is to tell the program: hey here is the stuff you need, take them! The centre of our story is compiler. It will not complete unless compiler is specified. Let's take C++ programming language and take g++ compiler for example. First, we can get a clear idea of what compiler should do when it confronts a bunch of code. Take a example from Makefile (an automatic way to build and compile program): $(CC) $(CFLAGS) $(INC_PATH) $(LIB_PATH) $(OBJECT_FILES) -o $(TARGET) Explanation $(CC): compiler $(CFLAGS): CLI option you need to parse to the compiler $(INC_PATH): directory to search for header files $(LIB_PATH): directory to search for library files (library files, *.a or *.so are just assemble of object files) $(OBJECT_FILES): your *.o files compiled by $(CC) from your source code like cpp,c AND library that you find in $(LIB_PATH) with header in $(INC_PATH) $(TARGET): your program! What we can conclude from the above example is
Remember the flags are overly simplified in the above Makefile case. In fact, we will need three things at the same time in specific:
A real case from C++ : (remember this is case by case for different compiler and different program) e.g., g++ -I/usr/include/x86_64-linux-gnu main.cpp -L/usr/lib/x86_64-linux-gnu -lboost_timer -lboost_system Art of order in compiling The c++ library resolve the undefined reference from left to right: from "the one don't resolve" to "the one resolve everything". Note 1. -v is the VERBOSE mode, which output every information FAQ
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AuthorShaowu Pan Archives
December 2017
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